Module Modload.Fields

val names : string list
val high : (t, Bap.Std.addr) Fieldslib.Field.t
val low : (t, Bap.Std.addr) Fieldslib.Field.t
val name : (t, string) Fieldslib.Field.t
val fold : init:'acc__0 -> name:('acc__0 -> (t, string) Fieldslib.Field.t -> 'acc__1) -> low:('acc__1 -> (t, Bap.Std.addr) Fieldslib.Field.t -> 'acc__2) -> high:('acc__2 -> (t, Bap.Std.addr) Fieldslib.Field.t -> 'acc__3) -> 'acc__3
val make_creator : name: ((t, string) Fieldslib.Field.t -> 'acc__0 -> ('input__ -> string) * 'acc__1) -> low: ((t, Bap.Std.addr) Fieldslib.Field.t -> 'acc__1 -> ('input__ -> Bap.Std.addr) * 'acc__2) -> high: ((t, Bap.Std.addr) Fieldslib.Field.t -> 'acc__2 -> ('input__ -> Bap.Std.addr) * 'acc__3) -> 'acc__0 -> ('input__ -> t) * 'acc__3
val create : name:string -> low:Bap.Std.addr -> high:Bap.Std.addr -> t
val map : name:((t, string) Fieldslib.Field.t -> string) -> low:((t, Bap.Std.addr) Fieldslib.Field.t -> Bap.Std.addr) -> high:((t, Bap.Std.addr) Fieldslib.Field.t -> Bap.Std.addr) -> t
val iter : name:((t, string) Fieldslib.Field.t -> unit) -> low:((t, Bap.Std.addr) Fieldslib.Field.t -> unit) -> high:((t, Bap.Std.addr) Fieldslib.Field.t -> unit) -> unit
val for_all : name:((t, string) Fieldslib.Field.t -> bool) -> low:((t, Bap.Std.addr) Fieldslib.Field.t -> bool) -> high:((t, Bap.Std.addr) Fieldslib.Field.t -> bool) -> bool
val exists : name:((t, string) Fieldslib.Field.t -> bool) -> low:((t, Bap.Std.addr) Fieldslib.Field.t -> bool) -> high:((t, Bap.Std.addr) Fieldslib.Field.t -> bool) -> bool
val to_list : name:((t, string) Fieldslib.Field.t -> 'elem__) -> low:((t, Bap.Std.addr) Fieldslib.Field.t -> 'elem__) -> high:((t, Bap.Std.addr) Fieldslib.Field.t -> 'elem__) -> 'elem__ list
val map_poly : ([< `Read | `Set_and_create ], t, 'x0) Fieldslib.Field.user -> 'x0 list
module Direct : sig ... end