Module Std.Exn

hardware exception

type t = {
  1. number : int;
    (*

    an exception number

    *)
  2. src : Bap.Std.addr option;
    (*

    a source address

    *)
  3. dst : Bap.Std.addr option;
    (*

    a destination address

    *)
}
include Core_kernel.Bin_prot.Binable.S with type t := t
val bin_size_t : t Bin_prot.Size.sizer
val bin_write_t : t Bin_prot.Write.writer
val bin_read_t : t Bin_prot.Read.reader
val __bin_read_t__ : (int -> t) Bin_prot.Read.reader
val bin_shape_t : Bin_prot.Shape.t
val bin_writer_t : t Bin_prot.Type_class.writer
val bin_reader_t : t Bin_prot.Type_class.reader
val bin_t : t Bin_prot.Type_class.t
val compare : t -> t -> int
val dst : t -> Bap.Std.addr option
val src : t -> Bap.Std.addr option
val number : t -> int
module Fields : sig ... end
include Ppx_sexp_conv_lib.Sexpable.S with type t := t
val t_of_sexp : Sexplib0__.Sexp.t -> t
val sexp_of_t : t -> Sexplib0__.Sexp.t