Arm_types
module Basic = Bap.Std.Disasm_expert.Basic
val __cond_of_sexp__ : Ppx_sexp_conv_lib.Sexp.t -> cond
val cond_of_sexp : Ppx_sexp_conv_lib.Sexp.t -> cond
val sexp_of_cond : cond -> Ppx_sexp_conv_lib.Sexp.t
val all_of_cond : cond list
val __nil_reg_of_sexp__ : Ppx_sexp_conv_lib.Sexp.t -> nil_reg
val nil_reg_of_sexp : Ppx_sexp_conv_lib.Sexp.t -> nil_reg
val sexp_of_nil_reg : nil_reg -> Ppx_sexp_conv_lib.Sexp.t
val all_of_nil_reg : nil_reg list
val __gpr_reg_of_sexp__ : Ppx_sexp_conv_lib.Sexp.t -> gpr_reg
val gpr_reg_of_sexp : Ppx_sexp_conv_lib.Sexp.t -> gpr_reg
val sexp_of_gpr_reg : gpr_reg -> Ppx_sexp_conv_lib.Sexp.t
val all_of_gpr_reg : gpr_reg list
val __bin_read_gpr_or_nil__ : 'a -> pos_ref:'b -> int -> gpr_or_nil
val bin_read_gpr_or_nil :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
gpr_or_nil
val bin_reader_gpr_or_nil : gpr_or_nil Core_kernel.Bin_prot.Type_class.reader
val bin_gpr_or_nil : gpr_or_nil Core_kernel.Bin_prot.Type_class.t
val compare_gpr_or_nil : gpr_or_nil -> gpr_or_nil -> int
val __gpr_or_nil_of_sexp__ : Ppx_sexp_conv_lib.Sexp.t -> gpr_or_nil
val gpr_or_nil_of_sexp : Ppx_sexp_conv_lib.Sexp.t -> gpr_or_nil
val sexp_of_gpr_or_nil : gpr_or_nil -> Ppx_sexp_conv_lib.Sexp.t
val all_of_gpr_or_nil : gpr_or_nil list
val __ccr_reg_of_sexp__ : Ppx_sexp_conv_lib.Sexp.t -> ccr_reg
val ccr_reg_of_sexp : Ppx_sexp_conv_lib.Sexp.t -> ccr_reg
val sexp_of_ccr_reg : ccr_reg -> Ppx_sexp_conv_lib.Sexp.t
val all_of_ccr_reg : ccr_reg list
val __bin_read_ccr_or_nil__ : 'a -> pos_ref:'b -> int -> ccr_or_nil
val bin_read_ccr_or_nil :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
ccr_or_nil
val bin_reader_ccr_or_nil : ccr_or_nil Core_kernel.Bin_prot.Type_class.reader
val bin_ccr_or_nil : ccr_or_nil Core_kernel.Bin_prot.Type_class.t
val compare_ccr_or_nil : ccr_or_nil -> ccr_or_nil -> int
val __ccr_or_nil_of_sexp__ : Ppx_sexp_conv_lib.Sexp.t -> ccr_or_nil
val ccr_or_nil_of_sexp : Ppx_sexp_conv_lib.Sexp.t -> ccr_or_nil
val sexp_of_ccr_or_nil : ccr_or_nil -> Ppx_sexp_conv_lib.Sexp.t
val all_of_ccr_or_nil : ccr_or_nil list
val __bin_read_non_nil_reg__ : 'a -> pos_ref:'b -> int -> non_nil_reg
val bin_read_non_nil_reg :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
non_nil_reg
val bin_reader_non_nil_reg : non_nil_reg Core_kernel.Bin_prot.Type_class.reader
val bin_non_nil_reg : non_nil_reg Core_kernel.Bin_prot.Type_class.t
val compare_non_nil_reg : non_nil_reg -> non_nil_reg -> int
val __non_nil_reg_of_sexp__ : Ppx_sexp_conv_lib.Sexp.t -> non_nil_reg
val non_nil_reg_of_sexp : Ppx_sexp_conv_lib.Sexp.t -> non_nil_reg
val sexp_of_non_nil_reg : non_nil_reg -> Ppx_sexp_conv_lib.Sexp.t
val all_of_non_nil_reg : non_nil_reg list
val __bin_read_reg__ : 'a -> pos_ref:'b -> int -> reg
val bin_read_reg :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
reg
val bin_reader_reg : reg Core_kernel.Bin_prot.Type_class.reader
val bin_reg : reg Core_kernel.Bin_prot.Type_class.t
val __reg_of_sexp__ : Ppx_sexp_conv_lib.Sexp.t -> reg
val reg_of_sexp : Ppx_sexp_conv_lib.Sexp.t -> reg
val sexp_of_reg : reg -> Ppx_sexp_conv_lib.Sexp.t
val all_of_reg : reg list
val bin_size_op :
[< `Imm of Bap.Std.word
| `Reg of
[< `CPSR
| `ITSTATE
| `LR
| `Nil
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP
| `SPSR ] ] ->
int
val bin_write_op :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `Imm of Bap.Std.word
| `Reg of
[< `CPSR
| `ITSTATE
| `LR
| `Nil
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP
| `SPSR ] ] ->
Bin_prot.Common.pos
val bin_writer_op :
[< `Imm of Bap.Std.word & Bap.Std.word
| `Reg of
[< `CPSR
| `ITSTATE
| `LR
| `Nil
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP
| `SPSR ] & [< `CPSR
| `ITSTATE
| `LR
| `Nil
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP
| `SPSR ] ]
Core_kernel.Bin_prot.Type_class.writer
val __bin_read_op__ :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
int ->
[> `Imm of Bap.Std.word | `Reg of reg ]
val bin_read_op :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
[> `Imm of Bap.Std.word | `Reg of reg ]
val bin_reader_op :
[> `Imm of Bap.Std.word | `Reg of reg ]
Core_kernel.Bin_prot.Type_class.reader
val bin_op :
[ `Imm of Bap.Std.word | `Reg of reg ] Core_kernel.Bin_prot.Type_class.t
val __op_of_sexp__ : Ppx_sexp_conv_lib.Sexp.t -> op
val op_of_sexp : Ppx_sexp_conv_lib.Sexp.t -> op
val sexp_of_op : op -> Ppx_sexp_conv_lib.Sexp.t
type move_insn = [
|
`ADCri
|
`ADCrr
|
`ADCrsi
|
`ADCrsr
|
`ADDri
|
`ADDrr
|
`ADDrsi
|
`ADDrsr
|
`ANDri
|
`ANDrr
|
`ANDrsi
|
`ANDrsr
|
`BICri
|
`BICrr
|
`BICrsi
|
`BICrsr
|
`CMNri
|
`CMNzrr
|
`CMNzrsi
|
`CMNzrsr
|
`CMPri
|
`CMPrr
|
`CMPrsi
|
`CMPrsr
|
`EORri
|
`EORrr
|
`EORrsi
|
`EORrsr
|
`MOVTi16
|
`MOVi
|
`MOVi16
|
`MOVr
|
`MOVsi
|
`MOVsr
|
`MOVPCLR
|
`MVNi
|
`MVNr
|
`MVNsi
|
`MVNsr
|
`ORRri
|
`ORRrr
|
`ORRrsi
|
`ORRrsr
|
`RSBri
|
`RSBrr
|
`RSBrsi
|
`RSBrsr
|
`RSCri
|
`RSCrr
|
`RSCrsi
|
`RSCrsr
|
`SBCri
|
`SBCrr
|
`SBCrsi
|
`SBCrsr
|
`SUBri
|
`SUBrr
|
`SUBrsi
|
`SUBrsr
|
`TEQri
|
`TEQrr
|
`TEQrsi
|
`TEQrsr
|
`TSTri
|
`TSTrr
|
`TSTrsi
|
`TSTrsr
]
val bin_write_move_insn :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `ADCri
| `ADCrr
| `ADCrsi
| `ADCrsr
| `ADDri
| `ADDrr
| `ADDrsi
| `ADDrsr
| `ANDri
| `ANDrr
| `ANDrsi
| `ANDrsr
| `BICri
| `BICrr
| `BICrsi
| `BICrsr
| `CMNri
| `CMNzrr
| `CMNzrsi
| `CMNzrsr
| `CMPri
| `CMPrr
| `CMPrsi
| `CMPrsr
| `EORri
| `EORrr
| `EORrsi
| `EORrsr
| `MOVPCLR
| `MOVTi16
| `MOVi
| `MOVi16
| `MOVr
| `MOVsi
| `MOVsr
| `MVNi
| `MVNr
| `MVNsi
| `MVNsr
| `ORRri
| `ORRrr
| `ORRrsi
| `ORRrsr
| `RSBri
| `RSBrr
| `RSBrsi
| `RSBrsr
| `RSCri
| `RSCrr
| `RSCrsi
| `RSCrsr
| `SBCri
| `SBCrr
| `SBCrsi
| `SBCrsr
| `SUBri
| `SUBrr
| `SUBrsi
| `SUBrsr
| `TEQri
| `TEQrr
| `TEQrsi
| `TEQrsr
| `TSTri
| `TSTrr
| `TSTrsi
| `TSTrsr ] ->
Bin_prot.Common.pos
val bin_writer_move_insn :
[< `ADCri
| `ADCrr
| `ADCrsi
| `ADCrsr
| `ADDri
| `ADDrr
| `ADDrsi
| `ADDrsr
| `ANDri
| `ANDrr
| `ANDrsi
| `ANDrsr
| `BICri
| `BICrr
| `BICrsi
| `BICrsr
| `CMNri
| `CMNzrr
| `CMNzrsi
| `CMNzrsr
| `CMPri
| `CMPrr
| `CMPrsi
| `CMPrsr
| `EORri
| `EORrr
| `EORrsi
| `EORrsr
| `MOVPCLR
| `MOVTi16
| `MOVi
| `MOVi16
| `MOVr
| `MOVsi
| `MOVsr
| `MVNi
| `MVNr
| `MVNsi
| `MVNsr
| `ORRri
| `ORRrr
| `ORRrsi
| `ORRrsr
| `RSBri
| `RSBrr
| `RSBrsi
| `RSBrsr
| `RSCri
| `RSCrr
| `RSCrsi
| `RSCrsr
| `SBCri
| `SBCrr
| `SBCrsi
| `SBCrsr
| `SUBri
| `SUBrr
| `SUBrsi
| `SUBrsr
| `TEQri
| `TEQrr
| `TEQrsi
| `TEQrsr
| `TSTri
| `TSTrr
| `TSTrsi
| `TSTrsr ]
Core_kernel.Bin_prot.Type_class.writer
val __bin_read_move_insn__ :
'a ->
pos_ref:'b ->
int ->
[> `ADCri
| `ADCrr
| `ADCrsi
| `ADCrsr
| `ADDri
| `ADDrr
| `ADDrsi
| `ADDrsr
| `ANDri
| `ANDrr
| `ANDrsi
| `ANDrsr
| `BICri
| `BICrr
| `BICrsi
| `BICrsr
| `CMNri
| `CMNzrr
| `CMNzrsi
| `CMNzrsr
| `CMPri
| `CMPrr
| `CMPrsi
| `CMPrsr
| `EORri
| `EORrr
| `EORrsi
| `EORrsr
| `MOVPCLR
| `MOVTi16
| `MOVi
| `MOVi16
| `MOVr
| `MOVsi
| `MOVsr
| `MVNi
| `MVNr
| `MVNsi
| `MVNsr
| `ORRri
| `ORRrr
| `ORRrsi
| `ORRrsr
| `RSBri
| `RSBrr
| `RSBrsi
| `RSBrsr
| `RSCri
| `RSCrr
| `RSCrsi
| `RSCrsr
| `SBCri
| `SBCrr
| `SBCrsi
| `SBCrsr
| `SUBri
| `SUBrr
| `SUBrsi
| `SUBrsr
| `TEQri
| `TEQrr
| `TEQrsi
| `TEQrsr
| `TSTri
| `TSTrr
| `TSTrsi
| `TSTrsr ]
val bin_read_move_insn :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
[> `ADCri
| `ADCrr
| `ADCrsi
| `ADCrsr
| `ADDri
| `ADDrr
| `ADDrsi
| `ADDrsr
| `ANDri
| `ANDrr
| `ANDrsi
| `ANDrsr
| `BICri
| `BICrr
| `BICrsi
| `BICrsr
| `CMNri
| `CMNzrr
| `CMNzrsi
| `CMNzrsr
| `CMPri
| `CMPrr
| `CMPrsi
| `CMPrsr
| `EORri
| `EORrr
| `EORrsi
| `EORrsr
| `MOVPCLR
| `MOVTi16
| `MOVi
| `MOVi16
| `MOVr
| `MOVsi
| `MOVsr
| `MVNi
| `MVNr
| `MVNsi
| `MVNsr
| `ORRri
| `ORRrr
| `ORRrsi
| `ORRrsr
| `RSBri
| `RSBrr
| `RSBrsi
| `RSBrsr
| `RSCri
| `RSCrr
| `RSCrsi
| `RSCrsr
| `SBCri
| `SBCrr
| `SBCrsi
| `SBCrsr
| `SUBri
| `SUBrr
| `SUBrsi
| `SUBrsr
| `TEQri
| `TEQrr
| `TEQrsi
| `TEQrsr
| `TSTri
| `TSTrr
| `TSTrsi
| `TSTrsr ]
val bin_reader_move_insn :
[> `ADCri
| `ADCrr
| `ADCrsi
| `ADCrsr
| `ADDri
| `ADDrr
| `ADDrsi
| `ADDrsr
| `ANDri
| `ANDrr
| `ANDrsi
| `ANDrsr
| `BICri
| `BICrr
| `BICrsi
| `BICrsr
| `CMNri
| `CMNzrr
| `CMNzrsi
| `CMNzrsr
| `CMPri
| `CMPrr
| `CMPrsi
| `CMPrsr
| `EORri
| `EORrr
| `EORrsi
| `EORrsr
| `MOVPCLR
| `MOVTi16
| `MOVi
| `MOVi16
| `MOVr
| `MOVsi
| `MOVsr
| `MVNi
| `MVNr
| `MVNsi
| `MVNsr
| `ORRri
| `ORRrr
| `ORRrsi
| `ORRrsr
| `RSBri
| `RSBrr
| `RSBrsi
| `RSBrsr
| `RSCri
| `RSCrr
| `RSCrsi
| `RSCrsr
| `SBCri
| `SBCrr
| `SBCrsi
| `SBCrsr
| `SUBri
| `SUBrr
| `SUBrsi
| `SUBrsr
| `TEQri
| `TEQrr
| `TEQrsi
| `TEQrsr
| `TSTri
| `TSTrr
| `TSTrsi
| `TSTrsr ]
Core_kernel.Bin_prot.Type_class.reader
val bin_move_insn :
[ `ADCri
| `ADCrr
| `ADCrsi
| `ADCrsr
| `ADDri
| `ADDrr
| `ADDrsi
| `ADDrsr
| `ANDri
| `ANDrr
| `ANDrsi
| `ANDrsr
| `BICri
| `BICrr
| `BICrsi
| `BICrsr
| `CMNri
| `CMNzrr
| `CMNzrsi
| `CMNzrsr
| `CMPri
| `CMPrr
| `CMPrsi
| `CMPrsr
| `EORri
| `EORrr
| `EORrsi
| `EORrsr
| `MOVPCLR
| `MOVTi16
| `MOVi
| `MOVi16
| `MOVr
| `MOVsi
| `MOVsr
| `MVNi
| `MVNr
| `MVNsi
| `MVNsr
| `ORRri
| `ORRrr
| `ORRrsi
| `ORRrsr
| `RSBri
| `RSBrr
| `RSBrsi
| `RSBrsr
| `RSCri
| `RSCrr
| `RSCrsi
| `RSCrsr
| `SBCri
| `SBCrr
| `SBCrsi
| `SBCrsr
| `SUBri
| `SUBrr
| `SUBrsi
| `SUBrsr
| `TEQri
| `TEQrr
| `TEQrsi
| `TEQrsr
| `TSTri
| `TSTrr
| `TSTrsi
| `TSTrsr ]
Core_kernel.Bin_prot.Type_class.t
val __move_insn_of_sexp__ : Ppx_sexp_conv_lib.Sexp.t -> move_insn
val move_insn_of_sexp : Ppx_sexp_conv_lib.Sexp.t -> move_insn
val sexp_of_move_insn : move_insn -> Ppx_sexp_conv_lib.Sexp.t
val all_of_move_insn : move_insn list
val __bits_insn_of_sexp__ : Ppx_sexp_conv_lib.Sexp.t -> bits_insn
val bits_insn_of_sexp : Ppx_sexp_conv_lib.Sexp.t -> bits_insn
val sexp_of_bits_insn : bits_insn -> Ppx_sexp_conv_lib.Sexp.t
val all_of_bits_insn : bits_insn list
val __mult_insn_of_sexp__ : Ppx_sexp_conv_lib.Sexp.t -> mult_insn
val mult_insn_of_sexp : Ppx_sexp_conv_lib.Sexp.t -> mult_insn
val sexp_of_mult_insn : mult_insn -> Ppx_sexp_conv_lib.Sexp.t
val all_of_mult_insn : mult_insn list
val compare_mem_multi_insn : mem_multi_insn -> mem_multi_insn -> int
val __mem_multi_insn_of_sexp__ : Ppx_sexp_conv_lib.Sexp.t -> mem_multi_insn
val mem_multi_insn_of_sexp : Ppx_sexp_conv_lib.Sexp.t -> mem_multi_insn
val sexp_of_mem_multi_insn : mem_multi_insn -> Ppx_sexp_conv_lib.Sexp.t
val all_of_mem_multi_insn : mem_multi_insn list
type mem_insn = [
|
mem_multi_insn
|
`LDRBT_POST_IMM
|
`LDRBT_POST_REG
|
`LDRB_POST_IMM
|
`LDRB_POST_REG
|
`LDRB_PRE_IMM
|
`LDRB_PRE_REG
|
`LDRBi12
|
`LDRBrs
|
`LDRD
|
`LDRD_POST
|
`LDRD_PRE
|
`LDREX
|
`LDREXB
|
`LDREXD
|
`LDREXH
|
`LDRH
|
`LDRHTr
|
`LDRH_POST
|
`LDRH_PRE
|
`LDRSB
|
`LDRSBTr
|
`LDRSB_POST
|
`LDRSB_PRE
|
`LDRSH
|
`LDRSHTi
|
`LDRSHTr
|
`LDRSH_POST
|
`LDRSH_PRE
|
`LDRT_POST_REG
|
`LDR_POST_IMM
|
`LDR_POST_REG
|
`LDR_PRE_IMM
|
`LDR_PRE_REG
|
`LDRi12
|
`LDRrs
|
`STRBT_POST_IMM
|
`STRBT_POST_REG
|
`STRB_POST_IMM
|
`STRB_POST_REG
|
`STRB_PRE_IMM
|
`STRB_PRE_REG
|
`STRBi12
|
`STRBrs
|
`STRD
|
`STRD_POST
|
`STRD_PRE
|
`STREX
|
`STREXB
|
`STREXD
|
`STREXH
|
`STRH
|
`STRHTr
|
`STRH_POST
|
`STRH_PRE
|
`STRT_POST_REG
|
`STR_POST_IMM
|
`STR_POST_REG
|
`STR_PRE_IMM
|
`STR_PRE_REG
|
`STRi12
|
`STRrs
]
val bin_size_mem_insn : [> mem_multi_insn ] -> int
val bin_write_mem_insn :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `LDMDA
| `LDMDA_UPD
| `LDMDB
| `LDMDB_UPD
| `LDMIA
| `LDMIA_UPD
| `LDMIB
| `LDMIB_UPD
| `LDRBT_POST_IMM
| `LDRBT_POST_REG
| `LDRB_POST_IMM
| `LDRB_POST_REG
| `LDRB_PRE_IMM
| `LDRB_PRE_REG
| `LDRBi12
| `LDRBrs
| `LDRD
| `LDRD_POST
| `LDRD_PRE
| `LDREX
| `LDREXB
| `LDREXD
| `LDREXH
| `LDRH
| `LDRHTr
| `LDRH_POST
| `LDRH_PRE
| `LDRSB
| `LDRSBTr
| `LDRSB_POST
| `LDRSB_PRE
| `LDRSH
| `LDRSHTi
| `LDRSHTr
| `LDRSH_POST
| `LDRSH_PRE
| `LDRT_POST_REG
| `LDR_POST_IMM
| `LDR_POST_REG
| `LDR_PRE_IMM
| `LDR_PRE_REG
| `LDRi12
| `LDRrs
| `STMDA
| `STMDA_UPD
| `STMDB
| `STMDB_UPD
| `STMIA
| `STMIA_UPD
| `STMIB
| `STMIB_UPD
| `STRBT_POST_IMM
| `STRBT_POST_REG
| `STRB_POST_IMM
| `STRB_POST_REG
| `STRB_PRE_IMM
| `STRB_PRE_REG
| `STRBi12
| `STRBrs
| `STRD
| `STRD_POST
| `STRD_PRE
| `STREX
| `STREXB
| `STREXD
| `STREXH
| `STRH
| `STRHTr
| `STRH_POST
| `STRH_PRE
| `STRT_POST_REG
| `STR_POST_IMM
| `STR_POST_REG
| `STR_PRE_IMM
| `STR_PRE_REG
| `STRi12
| `STRrs ] ->
Bin_prot.Common.pos
val bin_writer_mem_insn :
[< `LDMDA
| `LDMDA_UPD
| `LDMDB
| `LDMDB_UPD
| `LDMIA
| `LDMIA_UPD
| `LDMIB
| `LDMIB_UPD
| `LDRBT_POST_IMM
| `LDRBT_POST_REG
| `LDRB_POST_IMM
| `LDRB_POST_REG
| `LDRB_PRE_IMM
| `LDRB_PRE_REG
| `LDRBi12
| `LDRBrs
| `LDRD
| `LDRD_POST
| `LDRD_PRE
| `LDREX
| `LDREXB
| `LDREXD
| `LDREXH
| `LDRH
| `LDRHTr
| `LDRH_POST
| `LDRH_PRE
| `LDRSB
| `LDRSBTr
| `LDRSB_POST
| `LDRSB_PRE
| `LDRSH
| `LDRSHTi
| `LDRSHTr
| `LDRSH_POST
| `LDRSH_PRE
| `LDRT_POST_REG
| `LDR_POST_IMM
| `LDR_POST_REG
| `LDR_PRE_IMM
| `LDR_PRE_REG
| `LDRi12
| `LDRrs
| `STMDA
| `STMDA_UPD
| `STMDB
| `STMDB_UPD
| `STMIA
| `STMIA_UPD
| `STMIB
| `STMIB_UPD
| `STRBT_POST_IMM
| `STRBT_POST_REG
| `STRB_POST_IMM
| `STRB_POST_REG
| `STRB_PRE_IMM
| `STRB_PRE_REG
| `STRBi12
| `STRBrs
| `STRD
| `STRD_POST
| `STRD_PRE
| `STREX
| `STREXB
| `STREXD
| `STREXH
| `STRH
| `STRHTr
| `STRH_POST
| `STRH_PRE
| `STRT_POST_REG
| `STR_POST_IMM
| `STR_POST_REG
| `STR_PRE_IMM
| `STR_PRE_REG
| `STRi12
| `STRrs LDMDA LDMDA_UPD LDMDB LDMDB_UPD LDMIA LDMIA_UPD LDMIB LDMIB_UPD STMDA STMDA_UPD STMDB STMDB_UPD STMIA STMIA_UPD STMIB STMIB_UPD ]
Core_kernel.Bin_prot.Type_class.writer
val __bin_read_mem_insn__ : 'a -> pos_ref:'b -> int -> mem_insn
val bin_read_mem_insn :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
mem_insn
val bin_reader_mem_insn : mem_insn Core_kernel.Bin_prot.Type_class.reader
val bin_mem_insn : mem_insn Core_kernel.Bin_prot.Type_class.t
val __mem_insn_of_sexp__ : Ppx_sexp_conv_lib.Sexp.t -> mem_insn
val mem_insn_of_sexp : Ppx_sexp_conv_lib.Sexp.t -> mem_insn
val sexp_of_mem_insn : mem_insn -> Ppx_sexp_conv_lib.Sexp.t
val all_of_mem_insn : mem_insn list
val compare_branch_insn : branch_insn -> branch_insn -> int
val __branch_insn_of_sexp__ : Ppx_sexp_conv_lib.Sexp.t -> branch_insn
val branch_insn_of_sexp : Ppx_sexp_conv_lib.Sexp.t -> branch_insn
val sexp_of_branch_insn : branch_insn -> Ppx_sexp_conv_lib.Sexp.t
val all_of_branch_insn : branch_insn list
val compare_special_insn : special_insn -> special_insn -> int
val __special_insn_of_sexp__ : Ppx_sexp_conv_lib.Sexp.t -> special_insn
val special_insn_of_sexp : Ppx_sexp_conv_lib.Sexp.t -> special_insn
val sexp_of_special_insn : special_insn -> Ppx_sexp_conv_lib.Sexp.t
val all_of_special_insn : special_insn list
val bin_size_insn :
[< `ADCri
| `ADCrr
| `ADCrsi
| `ADCrsr
| `ADDri
| `ADDrr
| `ADDrsi
| `ADDrsr
| `ANDri
| `ANDrr
| `ANDrsi
| `ANDrsr
| `BFC
| `BFI
| `BICri
| `BICrr
| `BICrsi
| `BICrsr
| `BL
| `BLX
| `BLX_pred
| `BLXi
| `BL_pred
| `BX
| `BX_RET
| `BX_pred
| `Bcc
| `CMNri
| `CMNzrr
| `CMNzrsi
| `CMNzrsr
| `CMPri
| `CMPrr
| `CMPrsi
| `CMPrsr
| `CPS2p
| `DMB
| `DSB
| `EORri
| `EORrr
| `EORrsi
| `EORrsr
| `HINT
| `LDMDA
| `LDMDA_UPD
| `LDMDB
| `LDMDB_UPD
| `LDMIA
| `LDMIA_UPD
| `LDMIB
| `LDMIB_UPD
| `LDRBT_POST_IMM
| `LDRBT_POST_REG
| `LDRB_POST_IMM
| `LDRB_POST_REG
| `LDRB_PRE_IMM
| `LDRB_PRE_REG
| `LDRBi12
| `LDRBrs
| `LDRD
| `LDRD_POST
| `LDRD_PRE
| `LDREX
| `LDREXB
| `LDREXD
| `LDREXH
| `LDRH
| `LDRHTr
| `LDRH_POST
| `LDRH_PRE
| `LDRSB
| `LDRSBTr
| `LDRSB_POST
| `LDRSB_PRE
| `LDRSH
| `LDRSHTi
| `LDRSHTr
| `LDRSH_POST
| `LDRSH_PRE
| `LDRT_POST_REG
| `LDR_POST_IMM
| `LDR_POST_REG
| `LDR_PRE_IMM
| `LDR_PRE_REG
| `LDRi12
| `LDRrs
| `MLA
| `MLS
| `MOVPCLR
| `MOVTi16
| `MOVi
| `MOVi16
| `MOVr
| `MOVsi
| `MOVsr
| `MRS
| `MSR
| `MUL
| `MVNi
| `MVNr
| `MVNsi
| `MVNsr
| `ORRri
| `ORRrr
| `ORRrsi
| `ORRrsr
| `PKHTB
| `PLDi12
| `RBIT
| `REV
| `REV16
| `RSBri
| `RSBrr
| `RSBrsi
| `RSBrsr
| `RSCri
| `RSCrr
| `RSCrsi
| `RSCrsr
| `SBCri
| `SBCrr
| `SBCrsi
| `SBCrsr
| `SBFX
| `SMLABB
| `SMLAD
| `SMLAL
| `SMLALBT
| `SMLAWB
| `SMUAD
| `SMULBB
| `SMULL
| `SMULTB
| `STMDA
| `STMDA_UPD
| `STMDB
| `STMDB_UPD
| `STMIA
| `STMIA_UPD
| `STMIB
| `STMIB_UPD
| `STRBT_POST_IMM
| `STRBT_POST_REG
| `STRB_POST_IMM
| `STRB_POST_REG
| `STRB_PRE_IMM
| `STRB_PRE_REG
| `STRBi12
| `STRBrs
| `STRD
| `STRD_POST
| `STRD_PRE
| `STREX
| `STREXB
| `STREXD
| `STREXH
| `STRH
| `STRHTr
| `STRH_POST
| `STRH_PRE
| `STRT_POST_REG
| `STR_POST_IMM
| `STR_POST_REG
| `STR_PRE_IMM
| `STR_PRE_REG
| `STRi12
| `STRrs
| `SUBri
| `SUBrr
| `SUBrsi
| `SUBrsr
| `SVC
| `SWPB
| `SXTAB
| `SXTAH
| `SXTB
| `SXTH
| `TEQri
| `TEQrr
| `TEQrsi
| `TEQrsr
| `TSTri
| `TSTrr
| `TSTrsi
| `TSTrsr
| `UBFX
| `UMLAL
| `UMULL
| `UXTAB
| `UXTAH
| `UXTB
| `UXTH ] ->
int
val bin_write_insn :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `ADCri
| `ADCrr
| `ADCrsi
| `ADCrsr
| `ADDri
| `ADDrr
| `ADDrsi
| `ADDrsr
| `ANDri
| `ANDrr
| `ANDrsi
| `ANDrsr
| `BFC
| `BFI
| `BICri
| `BICrr
| `BICrsi
| `BICrsr
| `BL
| `BLX
| `BLX_pred
| `BLXi
| `BL_pred
| `BX
| `BX_RET
| `BX_pred
| `Bcc
| `CMNri
| `CMNzrr
| `CMNzrsi
| `CMNzrsr
| `CMPri
| `CMPrr
| `CMPrsi
| `CMPrsr
| `CPS2p
| `DMB
| `DSB
| `EORri
| `EORrr
| `EORrsi
| `EORrsr
| `HINT
| `LDMDA
| `LDMDA_UPD
| `LDMDB
| `LDMDB_UPD
| `LDMIA
| `LDMIA_UPD
| `LDMIB
| `LDMIB_UPD
| `LDRBT_POST_IMM
| `LDRBT_POST_REG
| `LDRB_POST_IMM
| `LDRB_POST_REG
| `LDRB_PRE_IMM
| `LDRB_PRE_REG
| `LDRBi12
| `LDRBrs
| `LDRD
| `LDRD_POST
| `LDRD_PRE
| `LDREX
| `LDREXB
| `LDREXD
| `LDREXH
| `LDRH
| `LDRHTr
| `LDRH_POST
| `LDRH_PRE
| `LDRSB
| `LDRSBTr
| `LDRSB_POST
| `LDRSB_PRE
| `LDRSH
| `LDRSHTi
| `LDRSHTr
| `LDRSH_POST
| `LDRSH_PRE
| `LDRT_POST_REG
| `LDR_POST_IMM
| `LDR_POST_REG
| `LDR_PRE_IMM
| `LDR_PRE_REG
| `LDRi12
| `LDRrs
| `MLA
| `MLS
| `MOVPCLR
| `MOVTi16
| `MOVi
| `MOVi16
| `MOVr
| `MOVsi
| `MOVsr
| `MRS
| `MSR
| `MUL
| `MVNi
| `MVNr
| `MVNsi
| `MVNsr
| `ORRri
| `ORRrr
| `ORRrsi
| `ORRrsr
| `PKHTB
| `PLDi12
| `RBIT
| `REV
| `REV16
| `RSBri
| `RSBrr
| `RSBrsi
| `RSBrsr
| `RSCri
| `RSCrr
| `RSCrsi
| `RSCrsr
| `SBCri
| `SBCrr
| `SBCrsi
| `SBCrsr
| `SBFX
| `SMLABB
| `SMLAD
| `SMLAL
| `SMLALBT
| `SMLAWB
| `SMUAD
| `SMULBB
| `SMULL
| `SMULTB
| `STMDA
| `STMDA_UPD
| `STMDB
| `STMDB_UPD
| `STMIA
| `STMIA_UPD
| `STMIB
| `STMIB_UPD
| `STRBT_POST_IMM
| `STRBT_POST_REG
| `STRB_POST_IMM
| `STRB_POST_REG
| `STRB_PRE_IMM
| `STRB_PRE_REG
| `STRBi12
| `STRBrs
| `STRD
| `STRD_POST
| `STRD_PRE
| `STREX
| `STREXB
| `STREXD
| `STREXH
| `STRH
| `STRHTr
| `STRH_POST
| `STRH_PRE
| `STRT_POST_REG
| `STR_POST_IMM
| `STR_POST_REG
| `STR_PRE_IMM
| `STR_PRE_REG
| `STRi12
| `STRrs
| `SUBri
| `SUBrr
| `SUBrsi
| `SUBrsr
| `SVC
| `SWPB
| `SXTAB
| `SXTAH
| `SXTB
| `SXTH
| `TEQri
| `TEQrr
| `TEQrsi
| `TEQrsr
| `TSTri
| `TSTrr
| `TSTrsi
| `TSTrsr
| `UBFX
| `UMLAL
| `UMULL
| `UXTAB
| `UXTAH
| `UXTB
| `UXTH ] ->
Bin_prot.Common.pos
val bin_writer_insn :
[< `ADCri
| `ADCrr
| `ADCrsi
| `ADCrsr
| `ADDri
| `ADDrr
| `ADDrsi
| `ADDrsr
| `ANDri
| `ANDrr
| `ANDrsi
| `ANDrsr
| `BFC
| `BFI
| `BICri
| `BICrr
| `BICrsi
| `BICrsr
| `BL
| `BLX
| `BLX_pred
| `BLXi
| `BL_pred
| `BX
| `BX_RET
| `BX_pred
| `Bcc
| `CMNri
| `CMNzrr
| `CMNzrsi
| `CMNzrsr
| `CMPri
| `CMPrr
| `CMPrsi
| `CMPrsr
| `CPS2p
| `DMB
| `DSB
| `EORri
| `EORrr
| `EORrsi
| `EORrsr
| `HINT
| `LDMDA
| `LDMDA_UPD
| `LDMDB
| `LDMDB_UPD
| `LDMIA
| `LDMIA_UPD
| `LDMIB
| `LDMIB_UPD
| `LDRBT_POST_IMM
| `LDRBT_POST_REG
| `LDRB_POST_IMM
| `LDRB_POST_REG
| `LDRB_PRE_IMM
| `LDRB_PRE_REG
| `LDRBi12
| `LDRBrs
| `LDRD
| `LDRD_POST
| `LDRD_PRE
| `LDREX
| `LDREXB
| `LDREXD
| `LDREXH
| `LDRH
| `LDRHTr
| `LDRH_POST
| `LDRH_PRE
| `LDRSB
| `LDRSBTr
| `LDRSB_POST
| `LDRSB_PRE
| `LDRSH
| `LDRSHTi
| `LDRSHTr
| `LDRSH_POST
| `LDRSH_PRE
| `LDRT_POST_REG
| `LDR_POST_IMM
| `LDR_POST_REG
| `LDR_PRE_IMM
| `LDR_PRE_REG
| `LDRi12
| `LDRrs
| `MLA
| `MLS
| `MOVPCLR
| `MOVTi16
| `MOVi
| `MOVi16
| `MOVr
| `MOVsi
| `MOVsr
| `MRS
| `MSR
| `MUL
| `MVNi
| `MVNr
| `MVNsi
| `MVNsr
| `ORRri
| `ORRrr
| `ORRrsi
| `ORRrsr
| `PKHTB
| `PLDi12
| `RBIT
| `REV
| `REV16
| `RSBri
| `RSBrr
| `RSBrsi
| `RSBrsr
| `RSCri
| `RSCrr
| `RSCrsi
| `RSCrsr
| `SBCri
| `SBCrr
| `SBCrsi
| `SBCrsr
| `SBFX
| `SMLABB
| `SMLAD
| `SMLAL
| `SMLALBT
| `SMLAWB
| `SMUAD
| `SMULBB
| `SMULL
| `SMULTB
| `STMDA
| `STMDA_UPD
| `STMDB
| `STMDB_UPD
| `STMIA
| `STMIA_UPD
| `STMIB
| `STMIB_UPD
| `STRBT_POST_IMM
| `STRBT_POST_REG
| `STRB_POST_IMM
| `STRB_POST_REG
| `STRB_PRE_IMM
| `STRB_PRE_REG
| `STRBi12
| `STRBrs
| `STRD
| `STRD_POST
| `STRD_PRE
| `STREX
| `STREXB
| `STREXD
| `STREXH
| `STRH
| `STRHTr
| `STRH_POST
| `STRH_PRE
| `STRT_POST_REG
| `STR_POST_IMM
| `STR_POST_REG
| `STR_PRE_IMM
| `STR_PRE_REG
| `STRi12
| `STRrs
| `SUBri
| `SUBrr
| `SUBrsi
| `SUBrsr
| `SVC
| `SWPB
| `SXTAB
| `SXTAH
| `SXTB
| `SXTH
| `TEQri
| `TEQrr
| `TEQrsi
| `TEQrsr
| `TSTri
| `TSTrr
| `TSTrsi
| `TSTrsr
| `UBFX
| `UMLAL
| `UMULL
| `UXTAB
| `UXTAH
| `UXTB
| `UXTH ]
Core_kernel.Bin_prot.Type_class.writer
val __bin_read_insn__ : 'a -> pos_ref:'b -> int -> insn
val bin_read_insn :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
insn
val bin_reader_insn : insn Core_kernel.Bin_prot.Type_class.reader
val bin_insn : insn Core_kernel.Bin_prot.Type_class.t
val __insn_of_sexp__ : Ppx_sexp_conv_lib.Sexp.t -> insn
val insn_of_sexp : Ppx_sexp_conv_lib.Sexp.t -> insn
val sexp_of_insn : insn -> Ppx_sexp_conv_lib.Sexp.t
val all_of_insn : insn list
Memory access operations